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7#
发表于 2009-7-6 12:56:06
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来自: 上海 来自 上海
280好象双核吧
• New single-core processor for mobile devices
• On-die, primary 32-kB instructions cache and 24-kB, write-back data cache
• 533-MT/s FSB support
• 512-kB on-die second level cache
• 2-Thread support
• Advanced gunning transceiver logic (AGTL+) bus driver technology
• Enhanced Intel SpeedStep® Technology
• Source synchronous double-pumped (2x) Address
• Source synchronous quad-pumped (4x) Data
• C0, C1, C1E, C2, C2E, C4, C4E low power states supported
Figure 1. Basic Mobile Platform’08 System Block Diagram
System Features
30 Intel Confidential Design Guide
• 22 x 22 mm, 1.0 mm ball pitch and 437 balls FCBGA
• Intel® Thermal Monitor support via TM1 and TM2 |
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